Grant: Discovery Grants Program - Individual

Computational electronics is a major research thrust which has wide applications in communications, consumer products, and portable equipment just to name a few. The demand for highly reliable and efficient realization is critical in the competitive market place. However, as the silicon technology reaches the nano domain, the design of the computational functions face major challenges including leakage current, voltage scaling, cost, and manufacturing yield. Driven by the requirement for lower power consumption, it is anticipated that the supply voltage will be scaled down to 300mV. Operation of devices in this voltage range requires new approaches to design logic elements and to realize digital systems that operate reliably. The investigator intends to tackle these issues in his research proposal, and to focus on probabilistic computing as one of the approaches to achieve fault and defect tolerant arithmetic functions, while maintaining the high performance and efficiency of realization. This methodology will be then integrated in the automated tool already developed by the investigator, which tends to customize the basic elements to the target application. While the main objective of proposed work will be on sub 32nm CMOS technology, however, the outcome of this research will pave the way to the investigator's future research program. The issues of defects, noise and integrity of operation will be tacked by developing basic defect aware computational structures by utilizing nano-devices such as carbon nanotubes and nano-wires. An in-depth research will be carried out supported by fabrication and characterization. This will then lead to the development of more complex computational functions targeting wireless applications.