Grant: Collaborative Research and Development Grants

The microelectronics industry uses 3D integration strategies - the assembly of multiple integrated circuits (IC) on over the others - to maintain the size reduction while increasing the performances and functionalities. In such assembly, the electrical connection between ICs is enabled by vias traversing the silicon substrate and dubbed through-silicon-vias (TSV). While Teledyne-DALSA Semiconductor (Bromont) has identified the technology for the 1st generation of TSV, it is already clear that the density of TSV will need to be greatly increased in the coming years to soothed the needs for the ever increasing pixel counts on imagers (market targeted by TDS). This project aims at developing the 2nd generation of TSV with 3µm diameters at most, spacing below 15µm while maintaining some 30µm of depth to guaranty the mechanical integrity of the silicon IC. This represents great challenges due to the nanometer size of the layers of material that must be deposited in narrow and deep cavities and to the fluid dynamics in such microstructures. The methods of testing the TSVs (more than 100 millions per 200mm wafer) and to predict their integrity during processing (cant test them all...) will also be the focus of the proposed project. The researchers at U. de Sherbrooke join forces with Alchimer, a French industrial, to tackle this challenge. Alchimer has developed a unique wet chemical process to produce TSV that comply to the technical requirements and to low costs of production. The project will allow students get valuable expertise with this unique process and the Canadian microelectronics research community will benefit by a greater access to TSV through the U. de Sherbrooke nanofabrication facility. Finally, the direct impact of this project will be to allow Teledyne-DALSA Semiconductor to maintain their leadership in MEMS and imager industry. The project is also supported by Nanoquébec.