Grant: Collaborative Research and Development Grants
University of British Columbia
$103,982.00
Formal verification of analog circuits and active inductors for deep-submicron design
FY 2009-10
Summary
This project builds upon two areas of ongoing collaboration between Intel and the University of British Columbia. The first topic, formal verification uses mathematical techniques to establish critical properties of designs and avoid costly errors. The second is the development of novel circuit techniques to address challenges in deep-submicron design. This project brings these two areas together in the design of active-inductor circuits and the demonstration of formal methods for analog circuit design.
Inductors play an important role in the interconnect between chips in a larger circuit. The traditional implementation of an inductor using a coil of wire has serious drawbacks when used on-chip. Such passive inductors consume large areas and have severe losses. Active inductors replace the coil of wire with circuits composed of transistors and capacitors that
mimic an inductor's behaviour. Such circuits take good advantage of the small transistors afforded by advanced fabrication processes and provide a further benefit of programmability. However, many issues including robustness, power consumption, and high-frequency limitations still remain.
This project addresses these issues. Formal methods based on discrete models have achieved significant success. This project extends the applicability of formal methods to analog circuits and high-performance digital designs. This project will identify benchmark verification problems, develop a common front-end to be used with several recently developed verification tools, and evaluate these tools using the benchmark circuits. Circuits arising from the active inductor research will be considered along with other examples from high-performance digital design. This process will guide further development of the tools and identify opportunities for incorporating these approaches into commercial design methods.
Program
Collaborative Research and Development Grants
Recipient
Location
British Columbia, Canada
Recipient Type
Academia
Type
Grant
Source
NSERC's Awards Data
As published
Application id
356905-2007
Name nom
Greenstreet, Mark
Department département
Computer Science
Organization id
2
Institution établissement
University of British Columbia
Province en
British Columbia
Province fr
Colombie-Britannique
Country en
CANADA
Country fr
CANADA
Fiscal year exercice financier
2009
Competition year année de concours
2007
Award amount
103982
Program id
CRDPJ
Program nane en
Collaborative Research and Development Grants
Program name fr
Subventions de recherche et développement coopérative
Group en
Research partnerships programs
Group fr
Programmes de partenariat
Committee code
96
Committee name en
RPP Internal Decision Cttee
Committee name fr
Cté de décision interne - PPR
Area of application code
513
Area of application group en
Manufacturing processes and products
Area of application group fr
Procédés et produits industriels
Area of application en
Electrical and electronic machinery and equipment (including computer hardware)
Area of application fr
Machinerie et équipement électriques et électroniques (y compris matériel informatique)
Research subject code
2519
Research subject group en
Electrical and electronic engineering
Research subject group fr
Génie électrique et électronique
Research subject en
Microelectronics
Research subject fr
Microélectronique
Partie
2
Nb partie
3
Application title
Formal verification of analog circuits and active inductors for deep-submicron design
Keyword
NA
Application summary
This project builds upon two areas of ongoing collaboration between Intel and the University of British Columbia. The first topic, formal verification uses mathematical techniques to establish critical properties of designs and avoid costly errors. The second is the development of novel circuit techniques to address challenges in deep-submicron design. This project brings these two areas together in the design of active-inductor circuits and the demonstration of formal methods for analog circuit design.
Inductors play an important role in the interconnect between chips in a larger circuit. The traditional implementation of an inductor using a coil of wire has serious drawbacks when used on-chip. Such passive inductors consume large areas and have severe losses. Active inductors replace the coil of wire with circuits composed of transistors and capacitors that
mimic an inductor's behaviour. Such circuits take good advantage of the small transistors afforded by advanced fabrication processes and provide a further benefit of programmability. However, many issues including robustness, power consumption, and high-frequency limitations still remain.
This project addresses these issues. Formal methods based on discrete models have achieved significant success. This project extends the applicability of formal methods to analog circuits and high-performance digital designs. This project will identify benchmark verification problems, develop a common front-end to be used with several recently developed verification tools, and evaluate these tools using the benchmark circuits. Circuits arising from the active inductor research will be considered along with other examples from high-performance digital design. This process will guide further development of the tools and identify opportunities for incorporating these approaches into commercial design methods.