Grant: Collaborative Research and Development Grants

Analog and mixed-signal (AMS) integrated circuits present post-silicon (post-Si) validation challenges becauseof the inherent limited controllability and observability of internal signals. Furthermore, the lack of rigorousspecifications complicates the debug process because it can be difficult to determine if the response of aparticular internal block is wrong or if it is only different than the responses that were observed in pre-Sisimulations. While large chips are making more and more use of AMS blocks, the analog circuits themselvesare becoming increasingly digital. Designers frequently use ""digitally assisted techniques"" to cope with theshortcomings of analog performance of the devices in advanced CMOS technologies by either augmenting theanalog circuits with digital blocks or, when possible, by replacing them. For example, traditional phase-lockedloops (PLLs) are giving way to predominantly digital designs with a minimum number of analog blocks,namely, the controllable oscillator, to limit the impact of device variability on the circuit. Furthermore,feedback control loops are ubiquitous in analog designs to compensate for process parameter, power supplyvoltage, and temperature (PVT) variations, adjust timing deskew, implement temperature regulation, etc. Thesecontrol loops are almost always implemented using digital hardware or with software running on an embeddedmicrocontroller. From this perspective, most AMS designs consist of a few analog blocks embedded in digitalcontrol loops. We observe that most of these control loops are based on simple controller designs such asproportional-integral (PI) controllers. Likewise, we observe that most analog blocks have simple responses,when viewed in the appropriate domains. By viewing AMS circuits as analog blocks embedded in digitalcontrollers, the objective of this research is to obtain a generic structure for AMS circuits (with an emphasis onPLLs) that can be leveraged for pre-Si verification and post-Si debug and validation. We propose varioustechniques for design, verification, and test of AMS integrated circuits and confirm the validity of thetechniques using proof-of-concept prototype integrated circuits implemented in advanced CMOS technologies.