Grant: Collaborative Research and Development Grants

Over the last four decades, silicon technology scaling has remarkably improved the integrated circuits (ICs) by increasing the transistor density and operating frequency while reducing the cost and energy consumption per transistor. However, the scaling of silicon technologies makes ICs more vulnerable to single event effects (SEEs) induced by energetic particles. In a well-designed IC, soft errors induced by SEEs appear to be the most troublesome both in terrestrial and high altitude or space environment. Silicon-on-insulator (SOI) process has emerging to be a promising technology for high speed and low power applications. The main objectives of the project are to characterize the single event transient pulses and develop/evaluate the redundant logic techniques by using the most advanced FDSOI process in order to reduce the soft error rate in Cisco's switches and other electronic products. The purpose is to precisely measure the pulse width induced by the ions in this advanced FDSOI technology, and then this information can be used to model the SET and develop corresponding mitigation techniques. We will also develop and evaluate the approximate logic techniques and apply them to realize ARM processors. Device and schematic simulation tools will be used for the investigation, so that SEE mitigation methods can be effectively developed. The fabricated test chips will be tested with pulsed laser, heavy ion, proton and neutron beams to verify the effectiveness of the designs. The results from different testing facilities will also be correlated. One PDF, two Ph.D. students and one mater's student will be trained to advance the technology and to work closely with the industrial partners. The research results will result in patentable technologies and publications in related journals and conferences. The Canadian industry partner (Cisco Canada) can adopt the technologies developed from this project to improve the reliability of their products such as switches and linecards. The project will also enhance the capability and expertise of the research group in the area of microelectronics reliability at the University of Saskatchewan.