Grant: Research Tools and Instruments - Category 1 (<$150,000)
University of British Columbia
$86,500.00
Shared-memory multiprocessor for parallel algorithms and architectures
EF 2010-11
Résumé
A shared-memory manycore parallel computer is required to pursue research into parallel algorithms and architectures for diverse range of applications including FPGAs, GPUs, bioinformatics, data mining, verification and scheduling of complex systems. Ideally, the system would be at the leading-edge of modern mainstream systems, which today is 64 processors with 256GB of memory at roughly $85,000. In 3-5 years time, such a system is likely to be economically mainstream as a standard engineering workstation priced below $10,000. We plan to immediately utilize such a leading-edge platform to allow us to prepare in advance for what will be soon become economically mainstream.
Performance scaling of traditional single-processor systems has slown dramatically since 2004 when processor clock frequency peaked around 3GHz. Instead, performance is now obtained through architectural innovation that exposes increased parallelism. As a result, mainstream processors now incorporate 2, 4 or even 8 cores in a single socket. In addition, hyperthreading allows 2 or more parallel program threads to be very finely interleaved on the same processor core - when one thread stalls waiting for slow main memory, one of the other threads immediately resumes and uses otherwise idle resources like the ALU or floating-point unit. It is even possible that a single core issues instructions from multiple threads in the same clock cycle.
As a result, parallel processors have very quickly become mainstream. Very soon, we will have 16 to 64 cores available on these mainstream processors. To prepare for this wave of vastly increased parallelism, we need appropriate parallel algorithms and architectures. Parallel programming is more difficult and time-consuming than traditional sequential programming, a skill best learned in graduate school. Furthermore, increased effort is required to develop parallel algorithms which can utilize the massive levels of parallelism soon to be available. A shared-memory multiprocessor is required to enable this research into effective parallel algorithms and architectures.
Programme
Research Tools and Instruments - Category 1 (<$150,000)
Bénéficiaire
Emplacement
British Columbia, Canada
Type de bénéficiaire
Academia
Type
Grant
Source
NSERC's Awards Data
Tel que publié
Application id
405923-2011
Name nom
Lemieux, Guy
Department département
Electrical and Computer Engineering
Organization id
2
Institution établissement
University of British Columbia
Province en
British Columbia
Province fr
Colombie-Britannique
Country en
CANADA
Country fr
CANADA
Fiscal year exercice financier
2010
Competition year année de concours
2011
Award amount
86500
Program id
EQPEQ
Program name en
Research Tools and Instruments - Category 1 (<$150,000)
Program name fr
Outils et instruments de recherche - catégorie 1 (<150 000$)
Group en
Discovery grants programs
Group fr
Programmes de subventions à la découverte
Committee code
1510
Committee name en
Electrical and Computer Engineering
Committee name fr
Génie électrique et informatique
Area of application code
801
Area of application group en
Information and communication services
Area of application group fr
Services d'information et de télécommunications
Area of application en
Computer software
Area of application fr
Logiciel
Research subject code
2704
Research subject group en
Information technology
Research subject group fr
Technologie de l'information
Research subject en
Distributed and parallel processing
Research subject fr
Traitement réparti et simultané
Partie
1
Nb partie
1
Application title
Shared-memory multiprocessor for parallel algorithms and architectures
Keyword
NSERC
Application summary
A shared-memory manycore parallel computer is required to pursue research into parallel algorithms and architectures for diverse range of applications including FPGAs, GPUs, bioinformatics, data mining, verification and scheduling of complex systems. Ideally, the system would be at the leading-edge of modern mainstream systems, which today is 64 processors with 256GB of memory at roughly $85,000. In 3-5 years time, such a system is likely to be economically mainstream as a standard engineering workstation priced below $10,000. We plan to immediately utilize such a leading-edge platform to allow us to prepare in advance for what will be soon become economically mainstream.
Performance scaling of traditional single-processor systems has slown dramatically since 2004 when processor clock frequency peaked around 3GHz. Instead, performance is now obtained through architectural innovation that exposes increased parallelism. As a result, mainstream processors now incorporate 2, 4 or even 8 cores in a single socket. In addition, hyperthreading allows 2 or more parallel program threads to be very finely interleaved on the same processor core - when one thread stalls waiting for slow main memory, one of the other threads immediately resumes and uses otherwise idle resources like the ALU or floating-point unit. It is even possible that a single core issues instructions from multiple threads in the same clock cycle.
As a result, parallel processors have very quickly become mainstream. Very soon, we will have 16 to 64 cores available on these mainstream processors. To prepare for this wave of vastly increased parallelism, we need appropriate parallel algorithms and architectures. Parallel programming is more difficult and time-consuming than traditional sequential programming, a skill best learned in graduate school. Furthermore, increased effort is required to develop parallel algorithms which can utilize the massive levels of parallelism soon to be available. A shared-memory multiprocessor is required to enable this research into effective parallel algorithms and architectures.