Grant: Discovery Grants Program - Individual
University of British Columbia
$116,000.00
Bringing Field-Programmable Gate Arrays to the Masses: Towards a Design Eco-System
EF 2021-22
Résumé
Computer-Aided Design Algorithms; Computer Architecture; Field-Programmable Gate Arrays; Hardware Acceleration; Very-Large Scale Integration
Programme
Discovery Grants Program - Individual
Bénéficiaire
Emplacement
British Columbia, Canada
Type de bénéficiaire
Academia
Type
Grant
Source
NSERC's Awards Data
Tel que publié
Application id
RGPIN-2017-04683
Name nom
Wilton, Steven
Department département
Electrical and Computer Engineering
Organization id
2
Institution établissement
University of British Columbia
Province en
British Columbia
Province fr
Colombie-Britannique
Country en
CANADA
Country fr
CANADA
Fiscal year exercice financier
2021
Competition year année de concours
2017
Award amount
116000
Program id
RGPIN
Program name en
Discovery Grants Program - Individual
Program name fr
Programme de subventions à la découverte - individuelles
Group en
Discovery grants programs
Group fr
Programmes de subventions à la découverte
Committee code
1510
Committee name en
Electrical and Computer Engineering
Committee name fr
Génie électrique et informatique
Area of application code
513
Area of application group en
Manufacturing processes and products
Area of application group fr
Procédés et produits industriels
Area of application en
Electrical and electronic machinery and equipment (including computer hardware)
Area of application fr
Machinerie et équipement électriques et électroniques (y compris matériel informatique)
Research subject code
2701
Research subject group en
Information technology
Research subject group fr
Technologie de l'information
Research subject en
Computer hardware
Research subject fr
Matériel informatique
Installment
inst:5; 6
Partie
2
Nb partie
6
Application title
Bringing Field-Programmable Gate Arrays to the Masses: Towards a Design Eco-System
Keyword
NSERC
Application summary
Computer-Aided Design Algorithms; Computer Architecture; Field-Programmable Gate Arrays; Hardware Acceleration; Very-Large Scale Integration
