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Grant: Strategic Projects Supplemental Competition

University of British Columbia

$73,000.00

Analytical models for FPGA architectures

EF 2007-08

Résumé
The development of computer chips normally requires access to a chip fabrication plant. The cost of accessingsuch a plant is out-of-reach for most small and medium-sized Canadian electronics companies. In the proposedresearch, we focus on an alternate way of building computer chips: using a Field-Programmable Gate Array(FPGA). An FPGA is a pre-manufactured chip which can be configured, in seconds, to implement virtually anyelectronic circuit. Once configured, these devices can be included in electronic devices such as communicationequipment, computers, and consumer devices.The development of new architectures for FPGAs is a time-consuming process. Typically, FPGA architecturalenhancements are developed in a somewhat ad-hoc manner. Expert FPGA architects perform experiments inwhich benchmark circuits are mapped using representative computer-aided design (CAD) tools, and theresulting density, speed, and/or power are estimatedIn this project, we propose the development of an analytical model that describes the architecture of an FPGA.FPGA architects could then use this model to help develop new devices that are more efficient than currentparts. The model will consist of a set of equations that, taken together, model not only the fundamentalbehaviour of a programmable logic architecture, but also the important aspects of the corresponding CADalgorithms. In the second part of the project, we will use the model to investigate novel architectures that aremore efficient than current architectures.
Programme
Strategic Projects Supplemental Competition
Emplacement
British Columbia, Canada
Type de bénéficiaire
Academia
Type
Grant
Source
NSERC's Awards Data

Tel que publié

Application id
356766-2007
Name nom
Wilton, Steven
Department département
Electrical and Computer Engineering
Organization id
2
Institution établissement
University of British Columbia
Province en
British Columbia
Province fr
Colombie-Britannique
Country en
CANADA
Country fr
CANADA
Fiscal year exercice financier
2007
Competition year année de concours
2007
Award amount
73000
Program id
STPSC
Program name en
Strategic Projects Supplemental Competition
Program name fr
Projets stratégiques compétition supplémentaire
Group en
Research partnerships programs
Group fr
Programmes de partenariat
Committee code
1067
Committee name en
Strategic Advanced Communications and Management of Information 2
Committee name fr
Stratégique -Technologies avancées de communication et de gestion de l'information 2
Area of application code
803
Area of application group en
Information and communication services
Area of application group fr
Services d'information et de télécommunications
Area of application en
Computer communications
Area of application fr
Téléinformatique
Research subject code
2504
Research subject group en
Electrical and electronic engineering
Research subject group fr
Génie électrique et électronique
Research subject en
Integrated circuits
Research subject fr
Circuits intégrés
Partie
1
Nb partie
2
Application title
Analytical models for FPGA architectures
Keyword
NA
Application summary
The development of computer chips normally requires access to a chip fabrication plant. The cost of accessingsuch a plant is out-of-reach for most small and medium-sized Canadian electronics companies. In the proposedresearch, we focus on an alternate way of building computer chips: using a Field-Programmable Gate Array(FPGA). An FPGA is a pre-manufactured chip which can be configured, in seconds, to implement virtually anyelectronic circuit. Once configured, these devices can be included in electronic devices such as communicationequipment, computers, and consumer devices.The development of new architectures for FPGAs is a time-consuming process. Typically, FPGA architecturalenhancements are developed in a somewhat ad-hoc manner. Expert FPGA architects perform experiments inwhich benchmark circuits are mapped using representative computer-aided design (CAD) tools, and theresulting density, speed, and/or power are estimatedIn this project, we propose the development of an analytical model that describes the architecture of an FPGA.FPGA architects could then use this model to help develop new devices that are more efficient than currentparts. The model will consist of a set of equations that, taken together, model not only the fundamentalbehaviour of a programmable logic architecture, but also the important aspects of the corresponding CADalgorithms. In the second part of the project, we will use the model to investigate novel architectures that aremore efficient than current architectures.