Grant: Discovery Grants Program - Individual

Reconfigurable Computing Platforms (RCPs) based on programmable logic devices (PLDs) have been widely used in various areas: aerospace, flexible manufacturing, wireless communication, etc. The primary reason for this use is the ability of such RCPs to adapt their hardware to the algorithm and data structure of the application. This important feature ensures high cost-performance characteristics compared to conventional microprocessor based platforms. Increasing level of complexity of nowadays applications has made an SRAM based Field Programmable Gate Array (FPGA) the most suitable choice for a PLD. However, such FPGAs are highly susceptible to radiation and other environmental factors. With reduction of a VLSI feature size the susceptibility tends to increase inhibiting the use of SRAM FPGA based RCPs in nuclear power stations, aerospace, and military areas, which are the most demanding for RCPs. The main objective of the proposed research is to develop testing methods oriented to digital devices, which will be applicable to SRAM FPGA based RCPs and will increase their fault tolerance. To achieve this objective the following tasks will be accomplished: - Error-Control Codes (ECC) will be reviewed in terms of applicability to on-line testing of digital devices - Encoding/decoding algorithms and encoder/decoders with simple hardware implementation will be analyzed - Self-checking as well as off-line digital testing methods based on the most efficient ECC will be examined - Applicability of the testing methods based on the ECC to partially reconfigurable FPGAs (e.g. Xilinx Virtex family) will be scrutinized - Hardware recovery procedures based on relocation of data-processing micro-architectures in FPGAs (with possible performance degradation) will be investigated. The outcome of the research will be invention of new on-line and off-line digital testing methods, which will contribute to development of a high-performance dependable RCP with improved lifetime parameters.