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Grant: Alliance Grants

University of British Columbia

$109,250.00

Reliability-Aware Design of Systems on Chip (SoCs)_x000d_

EF 2020-21

Résumé
The world is seeing a relentless penetration of smart devices and systems that fuel applications in all of the world's economic sectors, and all of the world's built and natural environments and beyond (outer space). Semiconductor devices (transistors) constitute the building blocks of integrated circuits (ICs) and systems on chip (SoCs) that, in turn, form the underlying technology that enables this formidable deployment. CMOS refers to the semiconductor fabrication technology used for the vast majority of electronic-based systems deployed today and projected to remain for years to come. The CMOS fabrication technology has been on a scaling (down) trajectory for decades, allowing for ever increasing transistor counts and yielding ever increasing system performance (speed) and capability. The reliability of transistors has always been a factor for consideration for IC manufacturers and system integrators. However, this reliability consideration is now reaching unprecedented levels of importance and challenge. The reasons are twofold: 1) a multitude of new(er) products are required to maintain a guaranteed level of performance over extended periods of time (years or decades) in possibly harsh environments, e.g., automotive, communications infrastructure, internet of things (IOT); 2) the ageing (performance deterioration over time) mechanisms that emerge as CMOS continues to scale are growing in relative importance (impact) and complexity. This project addresses these two factors and aims to provide solutions to meet higher reliability requirements in light of the more complex and ill-understood failure mechanisms. Our efforts will benefit IC manufacturers, and, most importantly, organizations (e.g., Huawei) where IC and system designers face increasingly significant reliability challenges. Canada has a large number of companies focused on the design of ICs for a multitude of applications. The outcomes of this project will benefit all such companies by allowing them to more economically and rapidly meet reliability requirements, thereby augmenting their competitiveness.
Programme
Alliance Grants
Emplacement
British Columbia, Canada
Type de bénéficiaire
Academia
Type
Grant
Source
NSERC's Awards Data

Tel que publié

Application id
555744-2020
Name nom
Ivanov, Andre
Department département
Electrical and Computer Engineering
Organization id
2
Institution établissement
University of British Columbia
Province en
British Columbia
Province fr
Colombie-Britannique
Country en
CANADA
Country fr
CANADA
Fiscal year exercice financier
2020
Competition year année de concours
2020
Award amount
109250
Program id
ALLRP
Program name en
Alliance Grants
Program name fr
Subventions Alliance
Group en
Research partnerships programs
Group fr
Programmes de partenariat
Committee code
96
Committee name en
RPP Internal Decision Cttee
Committee name fr
Cté de décision interne - PPR
Area of application code
513
Area of application group en
Manufacturing processes and products
Area of application group fr
Procédés et produits industriels
Area of application en
Electrical and electronic machinery and equipment (including computer hardware)
Area of application fr
Machinerie et équipement électriques et électroniques (y compris matériel informatique)
Research subject code
2504
Research subject group en
Electrical and electronic engineering
Research subject group fr
Génie électrique et électronique
Research subject en
Integrated circuits
Research subject fr
Circuits intégrés
Installment
inst:1 - 1
Partie
1
Nb partie
1
Application title
Reliability-Aware Design of Systems on Chip (SoCs)_x000d_
Keyword
NSERC
Application summary
The world is seeing a relentless penetration of smart devices and systems that fuel applications in all of the world's economic sectors, and all of the world's built and natural environments and beyond (outer space). Semiconductor devices (transistors) constitute the building blocks of integrated circuits (ICs) and systems on chip (SoCs) that, in turn, form the underlying technology that enables this formidable deployment. CMOS refers to the semiconductor fabrication technology used for the vast majority of electronic-based systems deployed today and projected to remain for years to come. The CMOS fabrication technology has been on a scaling (down) trajectory for decades, allowing for ever increasing transistor counts and yielding ever increasing system performance (speed) and capability. The reliability of transistors has always been a factor for consideration for IC manufacturers and system integrators. However, this reliability consideration is now reaching unprecedented levels of importance and challenge. The reasons are twofold: 1) a multitude of new(er) products are required to maintain a guaranteed level of performance over extended periods of time (years or decades) in possibly harsh environments, e.g., automotive, communications infrastructure, internet of things (IOT); 2) the ageing (performance deterioration over time) mechanisms that emerge as CMOS continues to scale are growing in relative importance (impact) and complexity. This project addresses these two factors and aims to provide solutions to meet higher reliability requirements in light of the more complex and ill-understood failure mechanisms. Our efforts will benefit IC manufacturers, and, most importantly, organizations (e.g., Huawei) where IC and system designers face increasingly significant reliability challenges. Canada has a large number of companies focused on the design of ICs for a multitude of applications. The outcomes of this project will benefit all such companies by allowing them to more economically and rapidly meet reliability requirements, thereby augmenting their competitiveness.