Grant: Discovery Grants Program - Individual

With the advancement of integrated circuits (IC) technology, many electronic devices are now implanted inside the human body in order to treat life-threatening diseases. Such devices range from implantable cardioverter defibrillators (ICDs) and pace makers to the devices implanted for controlling neurological dysfunctions, diabetes, and even body weight. ""Variability-aware Ultra Low-power Embedded Memory for Bio-implantable Systems-On-Chip"" primarily refers to the design and implementation of robust low-power on-chip memories for these implantable medical devices. By using a large capacity on-chip memory, which is typically realized using static random access memory (SRAM), these devices can be made more versatile in terms of processing the diagnostic data and providing the required therapy. The key challenge of embedding a large memory in an implantable system-on-chip (SOC) is to manage the off-state or leakage power consumption by the memory block. Typically, implanted devices use small batteries to minimize the patient's discomfort. As a result, the memory block and all other electronic components are subject to operate under stringent power budget in order to extend the battery life and reduce the frequency of the implant surgery. In addition, the memory block suffers from yield loss caused by process variations in nanometric IC processes and unintentional data upsets or soft errors caused by package materials and cosmic radiations. The proposed research aims to address these challenges. The research will model the impact of process variations on the data stability of SRAMs, develop circuit solutions for realizing variability-aware robust SRAMs, and design low-voltage SRAMs for minimizing the power consumption. Since the research develops high-yield low power SRAMs under the unavoidable process variations, it will have significant implications not only for implantable medical devices but also for any power-limited applications like battery powered hand-held PCs and mobile devices. In addition, the research will include the complete IC design flow, which is a highly desirable skill of electrical engineers to the semiconductor industry.