Grant: Collaborative Research and Development Grants

Complex electronic systems are built with separate integrated circuits (ICs) affixed to printed circuit boards (PCBs) that connect them to each other. This creates off-chip data flow bottlenecks, because the chips use macroscopic rather than microscopic connections; this limits the number of interconnections and hence the bandwidth. Macroscopic inter-chip connections increase power consumption and the chip package size. They also make the circuit boards more complex and increasingly challenging to design, as inter-chip bandwidth demand rises. The global objective of the project is to reduce the cost and development time of these systems using a high-density programmable system board that includes a wafer-scale integrated circuit (WaferIC). This WaferIC consists of a very dense array of more than 2.5 million fine conducting pads that are connected through a reconfigurable fault-tolerant interconnect network that can be set to connect any given pad to any other. Thus ICs can be placed anywhere on the WaferIC surface, and any set of connections between the pins/solder balls of those ICs can be dynamically configured. Hence, based on successful completion of this research project, prototyping a high-end PCB will become simply a matter of placing chips and programming the connections, in a matter of hours, instead of months.