Grant: Discovery Grants Program - Individual

Multi-Processor Scheduling and Power Management ``What matters most to the computer designers at Google is not speed, but power, low power, because data centers can consume as much electricity as a city.'' --- Dr. Eric Schmidt, CEO of Google Power is a key architectural design constraint, from the level of processor chips to the level of data centers run by the likes of Google. The most commonly used power management technique is speed scaling, which involves changing the speed of each processor. In tandem to determining at each time, which job to run on each processor, the operating system will need a speed scaling policy for setting the speed of each processor. As chips with hundreds to thousand of processors chips dominate the market in the next decade, it is generally agreed that developing software to harness their power is going to be a much more difficult technical challenge than the development of the hardware. We consider developing operating system algorithms/policies for scheduling processes with varying degrees of parallelism in a multiprocessor setting in a way that both optimizes some schedule quality of service objective, as well as some power related objective. A scheduling algorithm is said to be on-line if it lacks knowledge of which jobs will arrive in the future. It is said to be non-clairvoyant if it also lacks all knowledge about the jobs that are currently in the system. It is said to be competitive if, given only a constant fraction more resources in order to compensate for this lack of knowledge, it always performs only a constant times worse than the optimal all knowing scheduler.