Grant: Discovery Grants Program - Individual

Silicon technology will be reaching its last node in year 2016.  This is due to the scaling down of the Silicon transistor towards its fundamental physical limitations of operation, causing a real barrier to further advancement.  New emerging nanotechnologies, based on new non-Silicon transistors and devices, are needed beyond the year 2016 to meet the projected performance of Very Large Scale Integrated Circuits and system-on-a-chip.  However, a large number of defects is expected due to the fabrication imperfections and non-deterministic self-Assembly process of these emerging nanotechnologies.  Such high defect density, although not as severe, is also expected for conventional Silicon technology once it reaches its sub-50 nm dimensions.  This causes a major limitation for sustaining the growth of Silicon technology requiring extensive work at the circuit level to overcome the presence of high density of defects.This research program focus is on the development of novel circuit techniques robust to the presence of large number of defects in fabricated electronic chips.  The objective is to reach the needed defect-tolerance level by using initially hardware redundancy, at the transistor and small gate levels, to mask defective devices and components in conventional Silicon technology.  Then more robust circuit techniques will be developed for non-Silicon nanotechnology along with new logic circuit configurations based on emerging nanometer devices.  Canadian Microelectronics Corporation provides the design tools and access to advanced Silicon technologies.  Such sources will be used for the development of novel circuit techniques to overcome some of the limitations of emerging nanometer devices.  Circuit models of these nanoscale devices, especially Carbon Nanotube transistors and diodes, will be developed.  This research work is critical to maintain the desired manufacturing yield and the continuous advancement of semiconductor technology.  This research will help reduce the industrial need for circuit designers in the nanotechnology field, by providing excellent training opportunity for students at the device- and circuit-level.