Grant: Idea to Innovation
University of Alberta
$125,000.00
Low-area low-power delta-sigma ADCs for vertically-integrated CMOS digital pixel sensors (Phase 1)
EF 2011-12
Résumé
Microsystems exploit micro-level technology to deliver system-level performance. Digital cameras are a good example of this point, whereby tiny circuits in each pixel of an electronic image sensor are largely responsible for photographic capabilities. Digital cameras also provide the context for this NSERC Idea-to-Innovation (I2I) Grant. Because image sensors add billions of dollars in value to consumer, industrial, medical, and military applications, improvements in pixel design will have economic impact.
CCD and CMOS image sensors have enjoyed tremendous successes. Boyle and Smith shared a Nobel Prize for inventing the CCD technology and NASA invented the CMOS active pixel sensor (APS) technology that is now in every mobile phone. However, the dark limit with such image sensors is orders of magnitude worse than with the colour vision of human eyes, which is why cameras may need a flash when humans see just fine without one. If not impossible, it is very difficult to realize low dark limit with CCD or CMOS APS technology without sacrificing dynamic range, image quality, and/or video rate.
Conventional CCD and CMOS image sensors use analog pixels. Digital pixels, such as those invented by the applicant, are game changers. Simply put, digital technology is robust to the noise and distortion that is inherent to analog technology. The main advantage of analog pixels is they are smaller than digital pixels but wider trends suggest this obstacle also will be overcome. Whereas CCD and CMOS APS technology is planar, vertically-integrated (VI) CMOS technology enables 3D stacking of two or more semiconductor tiers to achieve a more complex integrated circuit within the same area.
By funding this I2I Grant, NSERC accelerates the pre-competitive development of promising technology originating from the university sector and promotes its transfer to an established Canadian company. The applicant will improve his digital pixel sensor (DPS) and realize it with VI-CMOS technology. A main deliverable will be an image sensor that enables a digital camera with unprecedented capabilities.
Programme
Idea to Innovation
Bénéficiaire
Emplacement
Alberta, Canada
Type de bénéficiaire
Academia
Type
Grant
Source
NSERC's Awards Data
Tel que publié
Application id
417897-2011
Name nom
Joseph, Dileepan
Department département
Electrical and Computer Engineering
Organization id
9
Institution établissement
University of Alberta
Province en
Alberta
Province fr
Alberta
Country en
CANADA
Country fr
CANADA
Fiscal year exercice financier
2011
Competition year année de concours
2011
Award amount
125000
Program id
I2IPJ
Program nane en
Idea to Innovation
Program name fr
De l'idée à l'innovation
Group en
Research partnerships programs
Group fr
Programmes de partenariat
Committee code
96
Committee name en
RPP Internal Decision Cttee
Committee name fr
Cté de décision interne - PPR
Area of application code
802
Area of application group en
Information and communication services
Area of application group fr
Services d'information et de télécommunications
Area of application en
Information systems and technology
Area of application fr
Systèmes d'information et technologie de l'information
Research subject code
2519
Research subject group en
Electrical and electronic engineering
Research subject group fr
Génie électrique et électronique
Research subject en
Microelectronics
Research subject fr
Microélectronique
Partie
1
Nb partie
1
Application title
Low-area low-power delta-sigma ADCs for vertically-integrated CMOS digital pixel sensors (Phase 1)
Keyword
NSERC
Application summary
Microsystems exploit micro-level technology to deliver system-level performance. Digital cameras are a good example of this point, whereby tiny circuits in each pixel of an electronic image sensor are largely responsible for photographic capabilities. Digital cameras also provide the context for this NSERC Idea-to-Innovation (I2I) Grant. Because image sensors add billions of dollars in value to consumer, industrial, medical, and military applications, improvements in pixel design will have economic impact.
CCD and CMOS image sensors have enjoyed tremendous successes. Boyle and Smith shared a Nobel Prize for inventing the CCD technology and NASA invented the CMOS active pixel sensor (APS) technology that is now in every mobile phone. However, the dark limit with such image sensors is orders of magnitude worse than with the colour vision of human eyes, which is why cameras may need a flash when humans see just fine without one. If not impossible, it is very difficult to realize low dark limit with CCD or CMOS APS technology without sacrificing dynamic range, image quality, and/or video rate.
Conventional CCD and CMOS image sensors use analog pixels. Digital pixels, such as those invented by the applicant, are game changers. Simply put, digital technology is robust to the noise and distortion that is inherent to analog technology. The main advantage of analog pixels is they are smaller than digital pixels but wider trends suggest this obstacle also will be overcome. Whereas CCD and CMOS APS technology is planar, vertically-integrated (VI) CMOS technology enables 3D stacking of two or more semiconductor tiers to achieve a more complex integrated circuit within the same area.
By funding this I2I Grant, NSERC accelerates the pre-competitive development of promising technology originating from the university sector and promotes its transfer to an established Canadian company. The applicant will improve his digital pixel sensor (DPS) and realize it with VI-CMOS technology. A main deliverable will be an image sensor that enables a digital camera with unprecedented capabilities.