Grant: Alliance Grants

The primary objective of this research is to develop cryptographic algorithms that are robust and can withstand Side Channel Attacks (SCAs). SCAs are a type of security attack where the attacker gains information from the physical implementation of a cryptosystem, rather than brute force or theoretical weaknesses in the algorithms. The resistance to such attacks is crucial in ensuring the security and integrity of data. The research aims to evaluate side-channel leakages at both pre-and post-silicon levels. The pre-silicon level refers to the design stage of a chip, including the Register-Transfer Level (RTL) design, gate-level design, and physical layout. At this stage, the research can determine the amount of side-channel leakage in the power profile of a Post-Quantum Cryptography (PQC) design. This early detection of potential vulnerabilities allows for timely rectification measures, enhancing the security of the final product.On the other hand, post-silicon validation involves testing the final manufactured chip for any side-channel leakages. The research effectively validates these leakages against various Side Channel Attack (SCA) models. Such comprehensive validation ensures that the cryptographic algorithm can withstand a wide range of potential attacks.In addition to these technical aspects, this research also provides an insightful discussion on potential challenges and strategies for future research in this field. It acknowledges that the landscape of cryptography and data security is ever-evolving, with new threats and attack vectors emerging regularly. Therefore, it emphasizes the need for continuous research and innovation to stay ahead of potential adversaries.The significance of this work extends beyond academia and has practical implications for hardware developers. It provides them with a tool to identify vulnerabilities against high order side-channel attacks in their designs.